Technical information, IT-HIST-DSP-023-029.
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Subject: Firmware history for systems Sirius & Saturn.
M. Ghirelli, Date: 14/10/15
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Modification category:
N=new feature
I=improvement
B=bug fix

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FW023-0230: Tt2_0230.out    [13/10/15] CRC32:[ACAA0498] 3Ph/Standard production
FW023-0230: Tt2_0230.ehx    [13/10/15] CRC32:[2D672B17] 3Ph/Standard production
FW029-0230: Mt2_0230.out    [14/10/15] CRC32:[DB67CEBF] 1Ph/Standard production
FW029-0230: Mt2_0230.ehx    [14/10/15] CRC32:[E04ED18C] 1Ph/Standard production

I   - Digitally filtered parallel signals: 
      "PARALLEL LINK" (10 ms) and "POWER GOOD" (2 ms)

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FW023-0218  -  FW023-0229  NOT RELEASED
FW029-0218  -  FW029-0229  NOT RELEASED

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FW023-0217: Tt2_0217.out    [04/02/14] CRC32:[1422A67F] 3Ph/Standard production
FW023-0217: Tt2_0217.ehx    [04/02/14] CRC32:[35C5D274] 3Ph/Standard production
FW029-0217: Mt2_0217.out    [04/02/14] CRC32:[F6841485] 1Ph/Standard production
FW029-0217: Mt2_0217.ehx    [04/02/14] CRC32:[10D4201B] 1Ph/Standard production

B   - Fixed bug related to possible false tripping of the overvoltage protection
      when the bypass voltage is greater than 240 V rms and the set voltage of 
      the inverter is less or equal than 220 V rms

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FW023-0216: Tt2_0216.out    [22/10/13] CRC32:[825D848F] 3Ph/Standard production
FW023-0216: Tt2_0216.ehx    [22/10/13] CRC32:[60BAA1F2] 3Ph/Standard production
FW029-0216: Mt2_0216.out    [22/10/13] CRC32:[F47788C8] 1Ph/Standard production
FW029-0216: Mt2_0216.ehx    [22/10/13] CRC32:[D5535583] 1Ph/Standard production

I   - Improved advanced input filter algorithm of the Phase Locked Loop (PLL)
I   - Increased maximum phase error accepted  between UPS voltage output and 
      bypass input voltage (by default set to 1 ms)
I   - Disabled controls in test mode

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FW023-0215: Tt2_0215.out    [30/07/13] CRC32:[2F055F2A] 3Ph/Standard production
FW023-0215: Tt2_0215.ehx    [30/07/13] CRC32:[6160886B] 3Ph/Standard production
FW029-0215: Mt2_0215.out    [30/07/13] CRC32:[3BDC1505] 1Ph/Standard production
FW029-0215: Mt2_0215.ehx    [30/07/13] CRC32:[516B5085] 1Ph/Standard production

N   - Added CSS mode
N   - Added output-filter damage recognition
N   - Added RMS protection (slow and fast)
I   - Improved filter for power unbalance in parallel mode
I   - Changed scope variables (Vout vs Vin and Iout vs Iinv)
B   - Fixed bugs related DSP oscilloscope 

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FW023-0214: NOT RELEASED
FW029-0214: NOT RELEASED

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FW023-0213: Tt2_0213.out    [24/11/11] CRC32:[367431EA] 3Ph/Standard production
FW029-0213: Mt2_0213.out    [24/11/11] CRC32:[4372B3E8] 1Ph/Standard production

N   - Added parameters for new UPS 100 kVA MLV (first firmware release for 
      this UPS)
N   - Added new "real time scope" protocol via SCI port (DSP)

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FW023-0212: Tt2_0212.out    [21/03/11] CRC32:[337A716A] 3Ph/Standard production
FW029-0212: Mt2_0212.out    [21/03/11] CRC32:[ABACB15B] 1Ph/Standard production

N   - Added parameters for new UPS 60 kVA and 80 kVA (first firmware release for 
      these UPS)
N   - Added test mode with AC connected independent for each phase 
N   - Added UPS Group Synchroniser (UGS) 
N   - Added advanced input filtering options for Phase Locked Loop (PLL) 
      synchronization
N   - Added inverter current gain calibration

I   - Improved bypass management (added digital filter on bypass signal)
I   - Improved identification of phase sequence
I   - Improved measurement of input frequency (added digital filter for 
      synchronizing RMS computation)

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FW023-0211: Tt2_0211.out    [27/05/10] CRC32:[554CCEA1] 3Ph/Standard production
FW029-0211: Mt2_0211.out    [27/05/10] CRC32:[E09EEFCC] 1Ph/Standard production

B  - Correct the malfunction of PFC in absence of the input phase 1.

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